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Clock Buffers | Clock Timing

New items

9DBL0442BKILF, Renesas Electronics

The Renesas Electronics buffers are low power, high performance members of Renesas full featured PCIe family. The buffers support PCIe Gen1 through Gen5. Spread spectrum compatible Dedicated output enable pin for each output One MHz to two hundred MHz operation in fan out mode Three selectable smbus addresses

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New items

9DBL0452BKILFT, Renesas Electronics

The Renesas Electronics buffers are low power, high performance members of Renesas' full featured PCIe family. The buffers support PCIe Gen1 through Gen5. Spread spectrum compatible Dedicated output enable pin for each output One MHz to two hundred MHz operation in fan out mode Three selectable smbus addresses

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New items

570BLFT, Renesas Electronics

The Renesas Electronics high performance zero delay buffer which integrates IDTs proprietary analog or digital phase locked loop techniques. The A version is recommended for 5 V designs and the B version for 3.3 V designs. The chip is part of IDTs clockBlocksTM family, and was designed as a performance upgrade to meet todays higher speed and lower voltage requirements. Eight pin soic package Passes spread spectrum clock modulation Full cmos clock swings with 25 ma drive capability at ttl levels Advanced, low power cmos process Industrial temperature version available

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New items

2305-1DCGI8, Renesas Electronics

The Renesas Electronics high speed phase lock loop clock buffer, designed to address high speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.The IDT2305 is an eight pin version of the IDT2309. IDT2305 accepts one reference input, and drives out five low skew clocks. Phase lock loop clock distribution Distributes one clock input to one bank of five outputs Zero input output delay No external rc network required Available in soic and tssop packages

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New items

CY22392FXI, Cypress Semiconductor

The CY22392 is an upgrade to the existing CY2292. The new device has a wider frequency range, greater flexibility, improved performance, and incorporates many features that reduce PLL sensitivity to external system issues. The device has three PLLs which, when combined with the reference, enable up to four independent frequencies to be output on up to six pins. These three PLLs are completely Programmable.

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New items

9DB433AGLF, Renesas Electronics

The Renesas Electronics 9DB433 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB433 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. Output cycle-cycle jitter <50ps Output to Output skew <50ps Phase jitter: PCIe Gen3 <1.0ps rms

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New items

ADCLK914BCPZ-R2, Analog Devices

Clock Buffers, Analog Devices Clock Generators/Buffers

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New items

CY22150FZXI, Cypress Semiconductor

The CY22150 is an extremely flexible clock generator with four basic variables that are used to determine the final output frequency. They are the input reference frequency (REF), the internally calculated P and Q dividers, and the post divider, which can be a fixed or calculated value.

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New items

574MILF, Renesas Electronics

The Renesas Electronics ICS574 is a low jitter, low-skew, high performance PLL-based zero delay buffer for high speed applications. Based on IDTs proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides four low skew outputs at speeds up to 160 MHz at 3.3 V. Packaged in 8 pin narrow SOIC, Pb (lead) free Zero input-to-output delay Four 1X outputs Output to output skew is less than 150 ps Output clocks up to 160 MHz at 3.3 V External feedback path for output edge placement Spread Smart™ technology works with spread spectrum clock generators

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New items

Si53159-A01AGM, Silicon Labs

Clock Buffers, Silicon Laboratories

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New items

9DML0441AKILF, Renesas Electronics

The Renesas Electronics 3.3V members of IDTs full featured PCIe family. They support PCIe Gen1 to 5 common clocked, separate reference no spread, and separate reference independent spread architectures. The parts provide a choice of asynchronous or glitch free, gapped clock switching modes, and offer a choice of integrated output terminations for direct connection to 85 ohm or 100 ohm transmission lines. Transmission lines saves up to 16 resistors Seventy nine mw typical power consumption Spread spectrum clocking compatible Output enable pins for each output Hcsl compatible differential inputs

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New items

CY23S05SXC-1H, Cypress Semiconductor

The CY23S05 is an 8-pin version of the CY23S09. It accepts one reference input, and drives out five low skew clocks. The -1H versions of each device operate at up to 100 and 133 MHz frequencies and have higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY23S09 has two bans of four outputs each, which can be controlled by the select inputs. If all output clocks are not required, Bank B can be three-stated. The select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes. The CY23S09 and CY23S05 PLLs enter a power down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off, resulting in less than 12.0 μA of current draw (for commercial temperature devices) and 25.0 μA (for industrial temperature devices).

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