IXYS IXFR32N100Q3

IXFR32N100Q3 IXYS
IXFR32N100Q3
IXYS

Product Information

Maximum Continuous Drain Current:
23 A
Transistor Material:
Si
Width:
5.21mm
Transistor Configuration:
Single
Maximum Drain Source Voltage:
1000 V
Maximum Gate Threshold Voltage:
6.5V
Package Type:
ISOPLUS247
Number of Elements per Chip:
1
Maximum Operating Temperature:
+150 °C
Typical Gate Charge @ Vgs:
195 nC @ 10 V
Channel Type:
N
Length:
16.13mm
Pin Count:
3
Channel Mode:
Enhancement
Mounting Type:
Through Hole
Maximum Power Dissipation:
570 W
Series:
HiperFET, Q3-Class
Maximum Gate Source Voltage:
-30 V, +30 V
Height:
21.34mm
Minimum Operating Temperature:
-55 °C
Maximum Drain Source Resistance:
350 mΩ
FET Feature:
-
HTSUS:
8541.29.0095
RoHS Status:
ROHS3 Compliant
Operating Temperature:
-55°C ~ 150°C (TJ)
Package / Case:
TO-247-3
Rds On (Max) @ Id, Vgs:
350mOhm @ 16A, 10V
Gate Charge (Qg) (Max) @ Vgs:
195 nC @ 10 V
Vgs(th) (Max) @ Id:
6.5V @ 8mA
REACH Status:
REACH Unaffected
FET Type:
N-Channel
Drive Voltage (Max Rds On, Min Rds On):
10V
Drain to Source Voltage (Vdss):
1000 V
Vgs (Max):
±30V
Moisture Sensitivity Level (MSL):
1 (Unlimited)
Power Dissipation (Max):
570W (Tc)
standardLeadTime:
46 Weeks
Input Capacitance (Ciss) (Max) @ Vds:
9940 pF @ 25 V
Mounting Type:
Through Hole
Series:
HiPerFET™, Q3 Class
Supplier Device Package:
ISOPLUS247™
Packaging:
Tube
Current - Continuous Drain (Id) @ 25°C:
23A (Tc)
Technology:
MOSFET (Metal Oxide)
Base Product Number:
IXFR32
ECCN:
EAR99
RoHs Compliant
Checking for live stock

This is manufactured by IXYS. The manufacturer part number is IXFR32N100Q3. While 23 a of maximum continuous drain current. The transistor is manufactured from highly durable si material. Furthermore, the product is 5.21mm wide. The product offers single transistor configuration. It has a maximum of 1000 v drain source voltage. The product carries 6.5v of maximum gate threshold voltage. The package is a sort of isoplus247. It consists of 1 elements per chip. It has a maximum operating temperature of +150 °c. With a typical gate charge at Vgs includes 195 nc @ 10 v. The product is available in [Cannel Type] channel. Its accurate length is 16.13mm. It contains 3 pins. The product carries enhancement channel mode. The product is available in through hole configuration. Provides up to 570 w maximum power dissipation. The product hiperfet, q3-class, is a highly preferred choice for users. It features a maximum gate source voltage of -30 v, +30 v. In addition, the height is 21.34mm. Whereas, the minimum operating temperature of the product is -55 °c. It provides up to 350 mω maximum drain source resistance. It is assigned with possible HTSUS value of 8541.29.0095. The product is rohs3 compliant. The product has -55°c ~ 150°c (tj) operating temperature range. Moreover, the product comes in to-247-3. It has a maximum Rds On and voltage of 350mohm @ 16a, 10v. The maximum gate charge and given voltages include 195 nc @ 10 v. The typical Vgs (th) (max) of the product is 6.5v @ 8ma. In addition, it is reach unaffected. It carries FET type n-channel. The drive voltage (maximum and minimum Rds On) of the product includes 10v. The product has a 1000 v drain to source voltage. The maximum Vgs rate is ±30v. Its typical moisture sensitivity level is 1 (unlimited). The product carries maximum power dissipation 570w (tc). It has a long 46 weeks standard lead time. The product's input capacitance at maximum includes 9940 pf @ 25 v. The product hiperfet™, q3 class, is a highly preferred choice for users. isoplus247™ is the supplier device package value. In addition, tube is the available packaging type of the product. The continuous current drain at 25°C is 23a (tc). This product use mosfet (metal oxide) technology. Moreover, it corresponds to ixfr32, a base product number of the product. The product is designated with the ear99 code number.

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IXFR32N100Q3, HiperFET Power MOSFET, Q3-Class, N-Channel Enhancement Mode, Fast Intrinsic Rectifier(Technical Reference)
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ESD Control Selection Guide V1(Technical Reference)
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IXFR32N100Q3(Datasheets)
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Mult DEV Mult Changes 13/May/2024(PCN Design/Specification)

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FAQs

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